Some example embodiments of the inventive concepts disclosed herein relate to a field effect transistors and/or methods of manufacturing the same, and more particularly, to vertical tunnel field effect transistors (VTFETs) and/or methods of manufacturing the same.
In related art, a VTFET is manufactured using a so-called “Gate First” process. According to the Gate First process, a gate metal material (e.g., a work function metal gate material) is deposited on a semiconductor substrate, which includes protruding fin structures, carbon based spin-on organic hard mask (C—SOH) is coated on the resultant structure, the C—SOH is partially etched back until an upper portion of the gate metal material is exposed to a certain extent, and then the exposed upper portion of the gate metal material is removed using, for example, an wet stripping process, to form a gate electrode having a desired gate length. The gate electrode (e.g., remaining portion of the work function gate metal material) vertically extends to a certain length and horizontally surrounds a fin structure, which is a protruding portion of the substrate and will function as a channel for the VTFET.
The length of the gate electrode of the VTFET (e.g., a height of the gate metal material remaining on the fin) depends on variations in various processes (e.g., C—SOH coating process, C—SOH etch back process, and/or wet stripping of the gate metal material). Thus, the gate length of the VTFET may vary depending on process variations, and electrical characteristics (e.g., shift in threshold voltage) of the VTFET may be degraded.
Further, in the Gate First process, a drain structure is formed using an epitaxial growth process on the fin structures after forming the gate metal electrode. Because the epitaxial growth process involves a substantially high thermal process, a work function of the gate electrode (e.g., a work function of the work function metal gate material) may be affected, and thus a threshold voltage of the VTFET may be shifted.